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SAMSUNG Announces Engineering Sample of World's first Mobile Application Processor in 32nm High-K Metal Gate Low Power Logic Process

Taipei, Taiwan on Sep 07, 2010

Taipei, Taiwan - September 7, 2010 : Samsung Electronics, Co., Ltd., a world leader in advanced semiconductor solutions, today announced that it will highlight an engineering sample of its application processor using its 32 nanometer (nm) low power High-K Metal Gate (HKMG) logic process in a demonstration at the seventh annual Samsung Mobile Solutions Forum held here in Taiwan at the Westin Taipei Hotel. Codenamed Saratoga, this new application processor was designed to provides a low power, high performance, and cost effective solution for next generation consumer electronic (CE) products such as personal navigation devices (PND), electronics dictionaries, and e-book readers.


"We announced, in June this year, the successful qualification of our 32nm HKMG low power logic process and design ecosystem," said Dr. Kwang-hyun Kim, senior vice president of System LSI Sales and Marketing, Samsung Electronics. "Saratoga is the world's first application processor that is implemented in this 32nm process which offers lower leakage current, higher performance, and higher gate density. We are excited to demonstrate such capability through this chip."


Likes its 45nm predecessor, S5P6440, the 32nm Saratoga application processor is based on an ARM1176™ CPU core. It features 2D graphics acceleration hardware that supports the OpenVG application programming interface (API) standard.


In addition to integrating peripherals and memory interface commonly used in many CE products to reduce BOM cost, Saratoga is also equipped with a mobile industry processor interface (MIPI) display serial interface (DSI) which minimizes the EMI and lowers the number of pins needed to connect with the display panel, greatly reducing design complexity and cost.

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