Exynos 4 Dual 45nm

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General Description

An application processor, or SoC (System on a Chip), is a microprocessor with a specialized architecture for deployment in embedded systems, such as digital still/video cameras, digital/smart TVs and set-top boxes, and automotive systems, among others. An SoC operates at frequencies from several hundred MHz to a few GHz, and is architected to deliver significant computing performances at low power consumption levels in limited board spaces. High-end SoCs often contain multiple cores, enabling them to deliver exceptional performances in applications such as digital imaging and multimedia devices.

Current-generation SoCs are capable of running full-fledged versions of modern operating systems, providing the user a rich, interactive interface on devices such as smartphones and tablet computers. Almost all the latest SoCs have the ability to decode a majority of multimedia codecs, and contain hardware engines to deliver enhanced multimedia experiences to the user. They also contain dedicated MMUs (memory management units) to manage the memory for applications being run on the device. Recent SoCs also have a multitude of peripheral connectivity solutions on the chip, offering the designer extensive control in providing connectivity options on the device. SoCs are application specific, and contain features targeted towards the intended deployment segment. Thus, an SoC designed for a mobile handset would include front-end GSM RF functionalities on-chip, which would be absent in an SoC designed for deployment in a digital still camera. An increasing number of SoCs, however, are now offering a wide range of features, making the processor suitable for deployment on any application. Samsung is a worldwide leader in providing the most advanced, efficient, and customizable SoC solutions for deployment on a wide range of platforms, such as digital imaging, multimedia, and mobile communication and computing. Samsung’s line of SoCs offers the highest performance, thermal stability, reliability, and I/O density in the smallest form factors at the lowest power consumption levels. Worldwide, Samsung is the preferred provider for SoC solutions for a majority of developers and OEMs for deployment on the broadest computing and communication devices and platforms.

Specifications

Detail Features
  • ARM CortexA9 dual core subsystem with 64-/128-bit SIMD NEON
    - 32KB (Instruction)/32KB (Data) L1 Cache and 1MB L2 Cache
    - 1.2Hz and 1.0GHz Core Frequency: Voltage 1.2V
  • 64-bit Multi-layered bus architecture
  • Internal ROM and RAM for secure booting, security, and general purposes
  • Memory Subsystem:
    - SRAM/ROM/NOR/NAND Interface with x8 or x16 data bus
    - OneNAND Interface with x16 data bus
    - 2-ports 32-bit 800Mbps LPDDR2/DDR2/DDR3 Interfaces
  • 8-bit ITU 601/656 Camera Interface
  • Multi-format Video Hardware Codec: 1080p 30fps (capable of decoding and encoding MPEG-4/H.263/H.264) and 1080p 30fps (capable of decoding MPEG-2/VC1)
  • JPEG Hardware Codec
  • 3D and 2D graphics hardware, supporting OpenGL ES 1.1/2.0, and OpenVG 1.1
  • LCD single or dual display, supporting 24bpp RGB, MIPI
  • Native triple display, supporting WSVGA LCD dual display and 1080p HDMI, simultaneously
  • Composite TV-out and HDMI 1.3a interfaces
  • GPS baseband integration with GPS RF interface
  • 2-ports (4-lanes and 2-lanes) MIPI DSI and MIPI CSI interfaces
  • 1-channel AC-97, 2-channel PCM, and 3-channel 24-bit I2S audio interface, supporting 5.1 channel audio
  • 1-channel S/PDIF interface support for digital audio
  • 8-channel I2C interface support for PMIC, HDMI, and general-purpose multi-master
  • 3-channel high-speed SPI
  • 4-channel high-speed UART (up to 3Mbps data rate for Bluetooth 2.1 EDR and IrDA 1.0 SIR)
  • USB 2.0 Device 1-channel, supporting FS/HS (12Mbps/480Mbps) with on-chip PHY
  • USB 2.0 Host 1-channel, supporting LS/FS/HS (1.5Mbps/12Mbps/480Mbps) with on-chip PHY
  • USB HSIC 2-channel, supporting (480Mbps) with on-chip PHY
  • Asynchronous Direct Modem Interface with 16KB DPSRAM
  • 4-channel SD/MMC interface, supporting SD 2.0, HS-MMC 4.3, and 1ch HS-MMC 4.4 DDR 4-bit interface muxed with HS-MMC 4.3
  • SATA AHCI 1-channel, supporting SATA1 (1.5Gbps) and SATA2 (3.0Gbps) with on-chip PHY
  • 32-channel DMA Controller
  • 14x8 keypad support
  • 10-channel 12-bit multiplexed ADCs
  • Configurable GPIOs
  • Real time clock, PLLs, timer with PWM, and watchdog timer

Block Diagram

Samsung Semiconductor Block Diagram

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However, subsequent product improvements may render some details inaccurate.

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Product information is accurate at the time of publication. However, subsequent product improvements may render some details inaccurate.

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Product information is accurate at the time of publication.
However, subsequent product improvements may render some details inaccurate.