Exynos 5 Hexa
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An application processor, or SoC (System on a Chip), is a microprocessor with a specialized architecture for deployment in embedded systems, such as digital still/video cameras, digital/smart TVs and set-top boxes, and automotive systems, among others. An SoC operates at frequencies from several hundred MHz to a few GHz, and is architected to deliver significant computing performances at low power consumption levels in limited board spaces. High-end SoCs often contain multiple cores, enabling them to deliver exceptional performances in applications such as digital imaging and multimedia devices.
Current-generation SoCs are capable of running full-fledged versions of modern operating systems, providing the user a rich, interactive interface on devices such as smartphones and tablet computers. Almost all the latest SoCs have the ability to decode a majority of multimedia codecs, and contain hardware engines to deliver enhanced multimedia experiences to the user. They also contain dedicated MMUs (memory management units) to manage the memory for applications being run on the device. Recent SoCs also have a multitude of peripheral connectivity solutions on the chip, offering the designer extensive control in providing connectivity options on the device. SoCs are application specific, and contain features targeted towards the intended deployment segment. Thus, an SoC designed for a mobile handset would include front-end GSM RF functionalities on-chip, which would be absent in an SoC designed for deployment in a digital still camera. An increasing number of SoCs, however, are now offering a wide range of features, making the processor suitable for deployment on any application. Samsung is a worldwide leader in providing the most advanced, efficient, and customizable SoC solutions for deployment on a wide range of platforms, such as digital imaging, multimedia, and mobile communication and computing. Samsung’s line of SoCs offers the highest performance, thermal stability, reliability, and I/O density in the smallest form factors at the lowest power consumption levels. Worldwide, Samsung is the preferred provider for SoC solutions for a majority of developers and OEMs for deployment on the broadest computing and communication devices and platforms.
|ARM Core Series||Cortex A15 / Cortex A7|
|Production Status||Mass Production|
|Speed||Up to 1.7GHz|
|Features||Hexa core / LPDDR3 / DDR3 Dual channel memory / WQXGA 60fps 3D graphic support / 28nm HKMG|
|Package||POP 828FCMSP / SCP 858FCFBGA|
- ARM Cortex-A15 based Dual CPU with NEON as high performance processor
- 32 KB (Instruction)/32 KB (Data) Cache and 1 MB L2 Cache
- Core Frequency: 1.7 GHz
- ARM Cortex-A7 Quad CPU called Kingfisher as power-efficient performance processor
- 32 KB (Instruction)/32 KB (Data) Cache and 512 KB L2 Cache
- Core Frequency: 1.3 GHz
- 128-bit Multi-layer network-on-chip (NoC) architecture
- Cache Coherent Interface (CCI) among Cortex-A15 and Cortex-A7
- Memory Subsystem:2-ports 32-bit 800 MHz LPDDR3/DDR3 Interfaces (Available LPDDR3 option for POP Package : 667MHz)
- Multi-format Video Hardware codec (MFC): 1080p 60 fps (capable of decoding and encoding MPEG-4/H.263/H.264/VP8 and decoding only MPEG-2/VC1)
- 3D and 2D graphics hardware, supporting a variety of APIs
- OpenGL ES 1.1/2.0/3.0, OpenCL 1.1,OpenVG 1.0.1, DirectX 11, and Google Renderscript
- Image Signal Processor: supporting BayerRGB up to 14-bit input with 8 MP 30 fps through MIPI CSI2
- interfaces and special functionalities such as with dynamic range compression (DRC) and face detection (FD).
- JPEG Hardware Codec
- LCD single display, supporting max WQXGA, 24 bpp RGB, YUV formats through MIPI DSI or eDP
- HDMI 1.4a interfaces with on-chip PHY
- 2-ports (4/2 lanes) MIPI CSI2 interfaces for both rear and front camera
- 1-port (4 lanes) eDisplayPort (eDP)
- 1-channel USB 3.0 Host or Device (with USB2.0 backward compatibility) with on-chip PHY
- 1-channel USB 2.0 Host, supporting LS/FS/HS (1.5 Mbps/12 Mbps/480 Mbps) with on-chip PHY
- 1-channel USB HSIC, supporting 480 Mbps with on-chip PHY
- 1-channel 8-bit eMMC 5.0
- 1-channel 8-bit SDIO 3.0
- 1-channel 4-bit SD 3.0
- 4-channel high-speed UART (up to 3Mbps data rate for Bluetooth 2.1 EDR and IrDA 1.0 SIR)
- 3-channel SPI
- 1-channel TSI
- 2-channel PCM and I2S audio interface, supporting 5.1 channel audio
- 1-channel S/PDIF interface support for digital audio (Tx only)
- 4-channel HS-I2C (up to 2.5 Mbps) for a variety of sensors (such as ambient light sensor and proximity sensor) and PMIC
- 8-channel I2C interface support (up to 400 kbps) for HDMI, general-purpose multi-master and ISP
- Security subsystem supporting hardware crypto accelerators, ARM TrustZone and TZASC
- 24-channel DMA Controller (8 channel MDMA, 8 x 2 channel PDMA)
- Configurable GPIOs
- Real time clock, PLLs, timer with PWM, multi-core timer, and watchdog timer
Product information is accurate at the time of publication.
However, subsequent product improvements may render some details inaccurate.