microcontrollers

smart card platform

Core and Platform

8-bit CISC CPU
- - Fast SAM89RC (Reduced Cycle) Core
- - Efficient register-oriented architecture
- - Released by interrupt of Idle and stop power-down modes
16-bit RISC CPU
- - High-performance 16bit CalmRISC 16 core
- - Low-power Consumption
- - Secure and optimized architecture
- - Harvard RISC architecture
- - 5-Stage pipeline
32-bit RISC CPU
- - High-performance and Secure 32 bit core
- - Cost-effective Architecture
- - RISC architecture supporting 16/32 bit instruction

Crypto & H/W Engine

TORNADO Co-Processor
- - Modular exponentiation accelerator
- - Montgomery calculation method
- - Various operand sizes (up to 2048 bit)
- - High-performance and low power consumption
- - Security library on request
AES Accelerator
- - Secure Architecture and High-performance
- - Various Key size(128bit, 192bit and 256bit)
DES Accelerator
- - Secure Architecture and High-performance
- - Optimized Architecture for Smartcard Application
SEED Accelerator
- - Secure Architecture and High-performance
- - Optimized Architecture for Smartcard Application