Our company makes every effort to achieve excellent and consistent product quality at fair prices, and at the right time to ensure customer satisfaction. In order to achieve this goal, our company continuously improves productivity by controlling the variation in various processes in a stable way. Continuous improvement is implemented by a closed loop methodology consisting of a selection of critical parameters, evaluation of the measurement system, monitoring of critical parameters, process capability improvement, and reaction plan. The main purpose of the CIP activities is minimizing the variation around the target.

Implementation Strategy

Samsung Semiconductor Implementation Strategy image

Activities

Real Time Monitoring (Activities for Special Causes)

  • Interlock System : Products and processes are monitored and controlled by automatic interlock systems throughout the manufacturing process. In FAB, a three stage protection system is working : Process Recipe Interlock (Incoming Materials and Recipe Check), Equipment Parameter Interlock and Process Output Interlock. At wafer sort, wafers are statistically monitored based on various test results and yields before assembly.
  • Statistical Process Control (SPC) and Advanced Process Control (APC) : An advanced SPC system suitable for semiconductor manufacturing processes has been implemented and used for random trend monitoring. It includes short run, small change detecting, particle, and multivariate SPC modules. Also, the APC system including real time control and run-to-run control is successfully used for controlling deterministic process behaviors.

Company-wide Improvement Projects (Activities for Common Causes)

  • FAB Equivalency - "Copy Intelligently" : Samsung Equivalence Test program checks the equivalency and non-equivalency of measurement data of output characteristics from "Copy Intelligently" activities. Its purpose is to lead us to make an action to standardize the output characteristics between lines or equipment.
  • Statistical Post Processing : Statistical analysis of test results at wafer sort not only optimizes test effort but also gives useful information such as potential reliability and yield. With a help of statistical approach, wafers or dies with latent risks can be effectively screened and dies can be binned according to potential risks.
  • Virtual Metrology and Modeling : Virtual metrology is of great interest in semiconductor manufacturing process. The idea is to construct predictive models that can forecast the electrical/physical parameters of wafers based on data collected from processing equipment. In this way, actual measurements from wafers can be minimized or eliminated. Furthermore, the APC combined with virtual metrology will lead to a shift from "Lot-to-Lot control" to "Wafer-to-Wafer control".