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Selecting a suitable package for deploying a particular semiconductor application requires the careful consideration of several physical and electrical factors. This document describes the sequence of steps that is involved in this process, and provides insight into each phase of the proces

Steps in Selecting a Package for an Application

Selecting and finalizing a particular package for a semiconductor application involves multiple stages, each of which is targeted towards meeting a specific goal, such as reliable operation over the intended temperature range, or successful radiation of generated heat under standard operating conditions. The ultimate goal of this process is to create a package that results in a highly-reliable, error-free device, under the working environment that the device is designed to be deployed in.

Phase 1: Feasibility Study

The very first phase in the package selection process is the feasibility study phase. This phase consists of the following steps:

  • Checking the possibility of packaging the design :
    A check is made to ensure whether the design can indeed be packaged or not. Certain designs, such as those using high-power semiconductors, cannot be integrated in a single package, necessitating a change in either the design or its planned package
  • Defining the basic structure of the package :
    If the design passes the possibility check, a basic structure for the package is defined considering its intended area of application. For example, a design intended to be deployed in a mobile device would be considered for integration in an FBGA package. During this step, the maximum margins for the physical parameters and form factors for the design, such as its weight and dimensions, are also estimated.
  • Performing a pre-characteristics simulation :
    The pre-characteristics simulation step provides an overview of how well the selected package suits the design. Put in other words, it provides the engineering team an idea of whether the package is compatible with the design or not. This is usually performed using specialized and automated tools.

Once the design passes the feasibility study phase, it proceeds to the next phase, wherein the first draft of the details for the package is created.

Phase 2: Initial Package Design

The following steps are carried out during the initial package design phase:

  • Defining detailed specifications for the package design :
    This step consists of specifying the package design in detail, with data such as the number and location of power/ground lines (for an FBGA package) and the location of I/O lines.
  • Mapping the package balls and bumps :
    A map is then created showing the layout of the balls and interconnecting bumps that the final package would have, along with the signals that the balls and bumps would carry.
  • SI/PI/TI pre-simulation :
    Next, pre-simulation tests are performed to obtain measures of SI (signal integrity), PI (power integrity), and TI (thermal integrity) for the package.
  • Power/ground planning :
    For packages that utilize multiple layers (such as PoPs), power/ground planning is a critical task and must be performed carefully to avoid phenomena such as ground bounce.
  • Timing/delay estimation :
    Signals for high speed designs that operate at several GHz, such as SoCs, must be made available at the package pins or balls considering all the intermediate delays in the signal paths. Transitional delays for all the signal lines are carefully estimated at this step.

The design, after passing all the steps in the initial design phase, proceeds to the production facilities. Together with the production processes, the final phase of the package design is carried out, as described next.

Phase 3: Final Package Design

The final package design phase takes place in parallel with the production of the design samples. The following steps are carried out during the final package design phase:

  • Post-characteristics simulation :
    Extensive PI/SI/TI simulations are performed to verify the design's stable operation and reliable performance in the selected package. As shown in Figure 1 above, eye diagrams are extensively used for SI simulation to detect any fatal violations for any signal on the chosen package.
  • Detailed thermal, warpage, and structural simulations :
    In-depth simulations are performed to obtain stable operational results for the thermal, warpage, and structural behavior of the package under the expected operating conditions.

At the end of this phase, the specifications for the design are finalized for production.

Phase 4: Quality Improvement using DFSS

Using business process management methodologies defined in DFSS (Design for Six Sigma), areas that can be improved for the packaging and production processes are identified. This is usually accomplished via meetings and discussions between senior technical and managerial staff.

Phase 5: Finalizing the Manufacturing Specifications

This is the last phase of the package design process, performed using an automated tool. In this phase, specifications for the package, such as its height, dimensions, pin/ball widths, and gap between pins/balls are specified in the production tool. Based on the selected fabrication technique, the tool then generates output data for the design to be supplied to the production fabs.


Electrical Simulation

Signal integrity Simulation

Package-level SDN Circuit Modeling SPICE Circuit Model S-parameter Model Preliminary Estimation Power/Ground Plane Model with Cavity Method

Power Integrity Simulation

Package-level PDN Circuit Modeling Simple Lumped Circuit Model Detailed SPICE Circuit Model, S-parameter Model Preliminary Estimation Power/Ground Plane Model with Cavity Method
Thermal Simulation

Package-Level Simulation

  • Tool used : ICECHIP (Ansys) - FEM
  • Considering Detail PCB Pattern
  • Auto Meshing
  • High Accuracy

System-Level Simulation

  • Tool used : Flotherm7.2 (Flomerics) - FVM
  • Considering System-level Overall Performance
  • Multi-Resolution Spatial Grid
  • Handling Package, Various Set Environment

Set-Level Thermal Management

  • Co-design of Package-level and Set-level solution
  • Set Environment Information Exchange is required
Mechanical Design (BLR, Warpage)

Warpage & Coplanarity

  • Warpage Prediction by Finite Element Method
  • 3D Linear Thermoelastic Simulation
  • Material Characterization
  • Warpage Measurement using Shadow Moire
  • Vertical Structure Optimization

Board Level Temperature Cycle

  • TC Life Prediction by Finite Element Method
  • 3D Thermoelastic / Viscoplastic Simulation
  • BLR Design Guide
  • Ball Configuration Optimization