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Samsung's QFP (Quad Flat Package) is a surface-mounted integrated circuit package that has its leads extending from each of its four sides. QFPs are used primarily for surface mount devices (SMDs). Sockets for QFP packages are used only during an application's test phases, and hole mounting for QFPs is not possible. QFPs are available in versions having from 32 to over 300 pins with a pitch ranging from 0.4 to 1.0 mm. LQFP (Low profile QFP) and TQFP (Thin QFP) are special versions of QFP packages that have advantages such as smaller heights and thinner structures. Figure 1 illustrates the outer packaging and internal structure of a typical QFP package.Samsung provides high-quality QFP packaging solutions at the required production scales at competitive costs.
QFPs have been used for several years for packaging and deploying increasingly complex devices, such as microprocessors/microcontrollers, ASICs, DSPs, programmable logic (FPGAs and CPLDs), static logic, memory devices, chipsets, video DACs, multimedia codecs, and other related applications. QFP applications are widely used in consumer and industrial products, automotive technology, computing devices, and other related segments.
QFPs demonstrate excellent thermal performance in their small sized packages, since the size of the die paddle within the package can be increased up to the package's physical boundaries, for better heat dissipation.
QFPs also demonstrate outstanding electrical performance. The short lengths of their outer pins present very low impedances for power and ground connections, as well as low inductances (less than 0.5 nH) for high frequency signals. Several QFP packages provide an exposed pad, allowing the common ground connection to be made to it (a technique known as "down bonding"), and reducing unwanted effects such as ground bounce.
Samsung's LQFP (Low-profile Quad Flat Package) is a surface-mounted integrated circuit package that has its component leads extending from each of its four sides. Pins for LQFP packages are numbered counter-clockwise from the index dot. Based on the area of deployment and operating considerations, such as power and frequency, the spacing between pins on an LQFP can vary. Common values for pin spacing are 0.4, 0.5, 0.65, and 0.80 mm.
TQFP (Thin Quad Flat Package) is a version of the QFP package designed primarily for use in space-constrained applications, such as PC cards. TQFP packaged chips have a thickness of either 1.00 mm, or 1.40 mm, and are thinner than their PQFP (Plastic Quad Flat Pack) equivalents, which range in thickness from 2.00 mm to 3.80 mm.
Low profile and thin QFP packages are differentiated and classified by their overall thickness (t) as per JEDEC definitions and standards, as listed below:
Low profile package (L type): 1.2 < t <= 1.7 mm
Thin QFP package (T type): 1 < t <= 1.2 mm
As stated above, the primary areas of deployment for the TQFP package are space-restricted applications where profile (or height) for the package is limited. This covers multiple segments, listed below:
Both TQFPs and LQFPs demonstrate excellent thermal stability. As previously stated, the availability of an exposed pad on the package significantly improves the thermal performance and reliability of the device under extreme temperature conditions.
The electrical performance of both TQFPs and LQFPs is equally outstanding, and is comparable to that of the standard QFP package. As in the case of QFP packages, the short lengths of pins in both TQFPs and LQFPs present low impedances for power and ground signal lines, as well as low inductances (less than 0.5 nH) for high frequency signals. The exposed pad in TQFP and LQFP packages acts as a heat sink, allows common ground connections to be made for the device using "down bonding", and reduces stray effects such as ground bounce
Samsung's ELP (Exposed Leadframe Package) is a surface-mounted Chip Scale Package (CSP) that uses a copper leadframe. An ELP is typically mounted on a main board through metal lands perimetrically placed on the bottom surface of the package. An ELP thus provides the most efficiently sized solution among leadframe packages. Additionally, an ELP can improve ground line connections to the package to the maximum extent by down bonding on the exposed pad on the bottom surface of the package, and turn out to be an outstanding packaging solution for high frequency devices. Furthermore, the exposed pad serves as an efficient heat dissipation path since it can be used as an area that can be soldered directly to the main board. An ELP thus also offers sufficiently high thermal performance.
The small size, low thermal impedance, and very low profile makes the ELP suitable for deployment in applications across multiple segments, such as analog devices, RF chipsets, gallium arsenide logic devices (which have higher power consumption than their silicon counterparts), microcontrollers, and memory devices (such as DRAM and flash memory). ELPs are capable of operating over both high frequencies (more than 1 GHz) and handling medium powers (from 1 to 2 W). Additionally, they can easily carry a low to medium number of pins (up to 150 pins).
The principal areas where ELPs are deployed are in high density PCBs, in applications such as mobile handsets, personal digital assistants (PDAs), LCD televisions, laptop computers, and personal multimedia players (PMPs), among others.
ELPs demonstrate outstanding thermal performance in their small sized packages, since the die paddle can be attached to the application's PCB for better heat dissipation and consequently, a low thermal resistance for the package.
ELPs offer excellent electrical performance due to the extremely short lengths of their interconnection pins, which offer very low impedances for power and ground connections, as well as low inductances (less than 0.5 nH) for high frequency signals. The exposed pad available on ELPs also serves as a common ground (used via down bonding).
The unique design and fabrication processes of an ELP offer superior reliability, resulting in the package withstanding long term storage conditions. The following are some of the reliability characteristics for an ELP :
Samsung's PBGA (Plastic Ball Grid Array) is a surface-mounted integrated circuit package that lends itself to the most advanced available assembly processes and designs for low cost, high performance applications. PBGA packages are one of the most popular across the semiconductor packaging industry, particularly for devices with high I/Os. PBGAs also have superior thermal and electrical characteristics, and can be used in multi chip module (MCM) configurations. The combination of high speed and high power advantages offered by PBGAs make them the first choice for deployment of mixed signal (analog and digital) or mixed semiconductor (CMOS and bipolar) technologies in a single package, in devices such as ASICs, and FPGAs/CPLDs (programmable logic), among others. Furthermore, the convenience of multiple layers that PBGAs provide greatly simplifies designs for the latest and most demanding applications.
PBGAs find widespread applications in devices across multiple segments. Some of these applications are listed below :
Specific versions of the PBGA package are available, that offer enhanced thermal performance as compared to the standard PBGA. The PBGA-H is one such variant that contains a heat spreader attached to the bottom surface of the device's die during production. This heat spreader, usually made of copper, forms the top side of the package, exposes the package surface to air, and consequently improves the thermal performance of the device by a significant margin.
PBGAs exhibit outstanding electrical performance, with the following key features :
Samsung's FBGA (Fine pitch BGA) is a surface-mounted integrated circuit package widely deployed in space-conscious applications, such as communication handsets, handheld computing devices, and consumer electronics. An FBGA is a scaled-down version of the standard BGA package, and is specifically designed for applications where board space is at a premium. An FBGA is a Chip Scale Package (CSP), meaning, the size of the package is almost the same as the size of the die inside of it. FGBAs are manufactured using a laminate substrate as their base, and are mounted on the application board using solder balls that are arranged in a grid at the bottom of the package body for external connections. Narrow ball pitches (< 0.8 mm) and a reduced physical outline and thickness make FBGAs ideal for packaging devices with high densities and high I/Os, such as processors, memory, and programmable logic devices (PLDs). FBGAs offer multiple benefits, such as low costs, small sizes and weights, high operating speeds, and medium power handling capabilities.
FBGAs are widely used in devices from applications across multiple segments. Some of the key application areas for FBGAs are listed below :
FBGAs have higher thermal resistance compared to other BGA packages (such as PBGAs), due to their smaller die and package body sizes. However, the thermal conductivities of the packaging materials used in the production of both the packages are identical. Apart from this, the thermal characteristics of FBGAs are similar to PBGAs in almost every aspect.
The thermal ball present in the center of an FBGA provides the package with a distinct advantage, enabling it to dissipate heat from the body more quickly than other similar packages. The thermal ball, along with thermal vias, allows heat to be dissipated from the device body by thermal conduction.
FBGAs demonstrate stable and reliable electrical performance over a wide range of operating powers and frequencies. Some of the important electrical features of the package are listed below :
Samsung's LGA (Land Grid Array) is a surface-mounted integrated circuit package and part of the standard BGA package family, but without any solder balls. Deployed in advanced, high performance applications, an LGA is a Chip Scale Package (CSP), meaning, the size of the package is almost the same as the size of the die inside of it. LGAs are manufactured using a laminate substrate as their base, and are available in industry-standard square and rectangular bodies. Since an LGA has no solder balls, the solder interconnection is formed exclusively by a solder-paste applied on the PCB during the device assembly phase. Elimination of solder balls lends an additional advantage of much lower profiles (heights) to the device, as compared to other packages, such as FBGAs and PBGAs. Narrow ball pitches (< 0.8 mm) and a reduced physical outline and thickness make LGAs the default choice for packaging devices designed for deployment in mobile communication and computing products, such as processors, memory, analog devices, and RF chipsets. LGAs offer the simultaneous benefits of low costs, small sizes and weights, high operating speeds, and excellent performance.
LGAs are the preferred packages for applications requiring an ideal combination of low device sizes and profiles, and superior thermal and electrical performance. Some of the principal areas of deployment for LGAs include :
Due to the absence of solder balls, an LGA has negligible internal stray parasitic elements associated with its external solder pads. This contributes to providing an extremely low thermal resistance to the device, to allow maximum heat transfer from the die to the package pads. Thus, in LGAs, the package pads act as thermal vias to dissipate heat away from the device. LGAs can thus be used reliably without any external heat sinks in compact applications, such as portable/handheld computers, and wireless communication equipment.
With constant advances in semiconductor fabrication and packaging technologies, LGAs have demonstrated consistently high electrical performance, making them the package of choice for applications operating at high frequencies and handling medium powers. The following are some of the key electrical features of LGAs :
SAMSUNG's WFP(Wafer fabricated package) incorporate the most advanced assembly processes and design for today's and tomorrow's cost & size effective applications. This solution is good for low~mid pin range with 8~200balls and has several advantages. Cost can be very low and reduced by die shrinks. as exactly chip size solution, WFP can provide the smallest form factor. Beside that, wafer level test, fewer process step and using existing fab process can make additional cost effectiveness. and this is also designed for low inductance, improved thermal operations and environmental safety. But WFP also has disadvantages that is fan-in design, limited infrastructure and high entry cost in early stage. In order to overcome fan-in limitation, SEC tries to development new fan-out WFP solution.
Need dry-packing during shipping
TCP (Tape Carrier Package) is a specially designed surface mounted integrated circuit form factor to package semiconductor devices with very small outlines and high lead counts. Examples of such devices include microprocessors/microcontrollers, and ASICs that power a multitude of small and lightweight applications, such as laptop and tablet computers, and advanced mobile handsets. TCP offers all the benefits, such as reduced lead pitches, ultra-thin package profiles, and smaller footprints for the device on the PCB, resulting in significant savings of board space for such applications.
The TCP package uses three separate layers - a carrier film, an adhesive material, and a metal layer - held together by a TAB (Tape Automated Bonding) tape, to form an interconnection from the device's die to the external circuitry for the device. As the connections are made directly from the die, this technique also contributes to lowering the interconnection inductances for the device's leads, significantly improving the electrical performance of the device. Devices in TCPs are most commonly shipped in tape and reel format.
TCPs offer several advantages for packaging a wide variety of display devices and panels used in applications as diverse as LCD and Plasma TV panel. Apart from their small size and low weight, they also offer good mechanical characteristics, and very high levels of operational reliability.
As stated earlier, TCPs are widely used as the default packaging solutions for the majority of high-end applications that have displays. This includes LCD and Plasma TV panel
TCPs possess excellent thermal stability and reliability, both on the shelf and under operation. As part of the package design, the back of the device is left exposed for thermal bonding to a corresponding metallization pad on the application's PCB. Additionally, standard heat transfer techniques, such as use of thermal vias, ensure outstanding reliability for the device during operation. Thick copper traces, which help in spreading heat away from the device, are also added to the device on the PCB during the application's PCB design phase. Overall, a TCP exhibits an admirable thermal performance for a surface mounted integrated circuit.
TCPs offer a great deal of reliability under varying operating environments. The unique design and manufacturing processes for TCPs provide sufficient handling capabilities for mechanical stress, along with variations in temperature and supply voltages. Additionally, the packages also have the ability to withstand long-term storage conditions when kept unpacked. The following are some of the key reliability statistics for TCPs :
Note: Tests carried out on 3-layer TCP, and 2-layer COF modules
The COF (Chip On Film) structure is specifically designed for connecting displays, such as TFT and LCD panels, to a PCB. It offers multiple benefits over similar and competing technologies, such as TCP (Tape Carrier Package), which are being phased out (except for PDI (Plasma Display IC)) and replaced by COFs.
COF offers a highly flexible process for assembling the display panel on a wide range of devices, from mobile handsets, to LCD televisions. The process involves the following steps :
Techniques, such as TAB (Tape Automated Bonding), are normally deployed to connect the display chip with the PCB. Use of such techniques provides multiple advantages, such as use of smaller bonding pads and finer bonding pitches, improved electrical contacts resulting in better electrical performance at higher frequencies, and shorter production cycles.
COFs lend several advantages to the production of display devices and panels, such as low dimensions and weights, lower power consumption, and ease of scalability with increases in display panel resolutions.
As stated earlier, COFs cover a wide spectrum of applications and are the default technique to implement display devices on all of today's high-end devices, such as mobile handsets, PDAs, LCD/PDP televisions, monitors, laptop/tablet computers, and PMPs, among others.
With carefully selected materials allowing sufficient thermal expansion and heat resistance, COFs present stable and reliable thermal performance. Moreover, the material for the film selected for bonding the chip is such that it presents minimum thermal shrinkage even with significant changes in temperature. Thus, the only factors limiting the thermal performance of COFs are the film, and the copper layer carrying the display signal lines.
The unique design, processing, and placing techniques (such as TAB) for COFs can provide high degrees of reliability for end applications. COFs also have the ability to withstand long-term storage conditions when kept unpacked. The following are some of the key reliability statistics for COFs :
Note: Tests carried out on 3-layer TCP, and 2-layer COF modules
Samsung's COG (Chip On Glass) technology is for directly assembling an integrated circuit onto its final (glass substrate), rather than being individually packaged as a standalone IC. The COG technique involves the use of a glass substrate as the PCB, on which the IC is directly mounted and interconnected.
COG technology uses unpackaged, bare chips brought out of the fab. Their contact pitches are then trimmed and adjusted as per the pitches on the glass panel (or substrate) using gold bumps and an ACF (Anisotropic Conductive Film). COG reduces the area needed to assemble a device on the glass PCB to the maximum extent, offering the highest component densities, with the device dies attached to the application's circuit board. Such densities can be efficiently leveraged in applications with small footprints, such as mobile handsets, and PDAs. COG also helps maximize I/O counts for a device due to the fine pitch offered by its glass substrate. COG results in a low cost solution for the end application, since a separate flexible PCB no longer needs to be integrated into the display panel to carry the display signals.
COG is widely deployed in the display panels of the latest generation LCD/LED televisions, mobile handsets, PDAs, monitors, and laptop/tablet computers, among others. The technology is also extensively used to implement single-chip solutions for LCD/LED display panels. Such panels contain an integrated DDI (Display Driver IC), graphic memory, and power controller IC, fabricated on a single COG and placed within the unit. COGs are also used for packaging standalone DDIs having higher operating frequencies and better electrical and thermal characteristics than DDIs supplied in other packages. The small size and weight of a COG device makes it ideal for deployment in any application with restrictions on weight and volume.
As stated in the Features section, COGs have a better and higher reliability than standalone packages for similar applications, due to fewer solder joints, and uniform heat dissipation from the device die into the substrate. The following are some of the key reliability statistics for COGs
Samsung has a wide range of COG devices with different characteristics. Some of the most important of these characteristics are listed below :
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