February 28, 2002 in Social Responsibility News

SAMSUNG Electronics Unveils 128Mb DDR Graphics Memory Chip

=== 128Mb DDR SDRAM , 400MHz Features ===

. 2.8V±5% power supply for device operation
. 2.8V±5% power supply for I/O interface
. SSTL_2 compatible inputs/outputs
. 4 banks operation
. MRS cycle with address key programs
-Read latency 3,4,5(clock)
-Burst length (2,4,8 and Full page)
-Burst type (sequential & interleave)
. Full page burst length for sequential burst type only
. Start address of the full page burst should be even
. All inputs except data & DM are sampled at the positive going edge of the system clock
. Differential clock input
. No Write-Interrupted by Read Function
. 4 DQS's (1DQS/Byte)
. Data I/O transactions on both edges of Data strobe
. DLL aligns DQ and DQS transitions with Clock transition
. Edge aligned data & data strobe output
. Center aligned data & data strobe output
. DM for write masking only
. Auto & Self refresh
. 32ms refresh period (4K cycle)
. 144-Ball FBGA
. Maximum clock frequency up to 400MHz
. Maximum data rate up to 800Mbps/pin


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