Current and Future Data Demands
Even semiconductor and memory chip development add to this increase in data sharing. Currently, these fields account for the transferal of approximately 4 Exabytes of data per month. However, that number is projected to increase to 10 Exabytes per month in 2016. Improvements must be made to existing memory to rise to the challenge of such rapid data growth.
Benefits of Samsung V-NAND over 2D Planar NAND
- More capacity
- More speed
- More endurance
- More power efficiency
Samsung's new 3D V-NAND will be used for a wide range of consumer electronics and enterprise applications, including solid state drives (SSDs). Consumers can expect their handheld computers to perform better for longer periods of time between charges. Datacenter managers can expect increased productivity and longevity while saving on their power bill.
Structural Changes Lead to Samsung V-NAND Memory
Over the past 15 years, NAND Flash memory cell structure has gone from 120nm scale to 19nm scale. Along with this drastically shrinking structure, capacity has grown by 100 times. Just how is Samsung V-NAND Flash memory able to offer 100 times the capacity in only 1/10th the same area? That's where the V in V-NAND comes in, as Samsung stacks the cells vertically.
Samsung's three-dimensional Vertical NAND Flash memory (3D V-NAND) breaks free of the scaling limit for existing NAND Flash technology. Samsung has developed a new structure through its first 24-layer V-NAND
Problems with Shrinking Technology
Shrinking is a fundamental technological advancement in almost any field, but it gains significant importance in memory engineering. As memory structures shrink, so do the multitude of mobile devices people worldwide use on a daily basis. Samsung has committed considerable resources and effort toward researching and developing shrinking advancements while also working to mitigate the two biggest problems inherent in shrinking technology.
When an electric charge flows into one cell, an electric charge flows into a neighboring cell (known as the coupling effect). This extraneous charge to the neighboring cell actually changes the stored data, resulting in corruption of that data. This interference does not occur when the space between cells is greater than 30nm, but as that space shrinks smaller than 20nm, the chance for cell-to-cell interference increases.
Patterning is a manufacturing technology developed for photolithography to enhance density. The patterning process allows for geometries half as wide as the scanner is capable of printing, but it has its limits within the 10nm process range.
Overcoming Inherent Shrinking Problems
Samsung has developed and applied a variety of technologies to prevent both data-corrupting interference and the limits of patterning. 3D V-NAND replaces 2D Planar NAND's conductor with an insulator that allows cells to hold their charges after writing data. Due to its vertical cell arrangement, Samsung's 3D V-NAND features a wider bit line, effectively removing cell-to-cell interference.
Stacking the vertical layers in three dimensions allowed for 24-layer products in 2013 and has increased to 32-layer products in June of 2014. Using stacking instead of photolithography to increase capacity eliminated the patterning limitation.