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eMMC

the world's first 3x nm base, now that's high density.
What is eMMC?
eMMC = High-density MLC NAND Flash & MMC controller

eMMC architecture

Features & Benefits
easy to use
  • Simple read/write memory using industry-standard eMMC 4.41 interface
  • No need to develop firmware for eMMC controller
provides cost-effective solution
  • Faster product development and time to market
  • Common solution for embedded and external flash memory
  • Low-cost embedded solution with MLC NAND
  • Performance increase costs less
    - 4 stacked raw NAND - must increase performance of all NAND (4 times overhead)
    - 4 stacked eMMC - increase performance of just one MMC controller
  • Can be used with low-cost legacy chipsets
    - Solutions for legacy chipset supporting only SLC interface with eMMC interface
  • JEDEC standardization in process
NAND technology changes invisible to the host
  • The trend of NAND standardization (e.g., ONFI) does not mean raw NAND will not change
  • Variation of NAND flash feature NAND block sizes, page sizes, planes, new features, MLC vs. SLC, wear leveling and ECC requirements

eMMC is an embedded storage solution with an MMC interface, flash memory and controller, all in a small BGA package. It is based upon the industry-standard MMC System Specification v4.41 and JEDEC BGA packaging standards. With interface speeds of up to 52 MB per second, eMMC provides fast scalable performance. It supports x1, x4 or x8 bus width and allows for an interface voltage of either 1.8v or 3.3v.

eMMC provides a flexible, industry-standard architecture that simplifies mass storage designs for portable consumer electronics products. With eMMC, a host system can now gain access to all major classes of mass-storage memory subsystems, including embedded memory (eMMC), memory cards or even hard disk drives (via ATA-on-MMC specification) with one common MMC Interface Protocol Bus.

The standardized eMMC protocol interface offers designers high performance and makes technology complexity -- such as NAND Flash functional differences among suppliers -- invisible to the host. This differs from the conventional architecture, where a host system must contend with generational process geometry shrinks and technical complexities such as Multi-Level Cell (MLC) technology while supporting the company-specific functions of individual flash memory suppliers to achieve the necessary performance.

The benefits of eMMC to host manufacturers are a simpler product design and qualification process and shorter time to market overall.

eMMC Feature Comparison
  eMMC4.3 eMMC4.4 eMMC4.41 eMMC 4.5
(Jun. 2011)
Bus Width x1/x4/x8 x1/x4/x8 x1/x4/x8 x1/x4/x8
Clock Frequency ~ 52MHz ~ 52MHz ~ 52MHz ~ 200MHz
Alternative Boot Yes (option) Yes (mandatory) Yes Yes
Max bandwidth 52MB/s 104MB/s 104MB/s 200MB/s
H/W reset No Yes Yes Yes
DDR Interface No Yes Yes Yes
Multi-Partition No Yes Yes Yes
Enhanced mode
(SLC + MLC)
No Yes Yes Yes
Security feature
(Trim, RPMB, Secure Erase,
Secure Trim)
No Yes Yes Yes
Secure Trim Refinement No No Yes Yes
High Priority Interrupt No No Yes Yes
Back Ground Operation No No Yes Yes
Packed Command No No No Yes
Cache Handling No No No Yes
Discard No No No Yes
Dynamic Capacity No No No Yes
Sanitize No No No Yes
eMMC Architecture

eMMC Architecture

dual power supply
  • Vcc : 3.0V for MLC NAND Flash
  • Vccq : 1.8V/3.0V for I/O
eMMC4.41 interface
  • x1, x4, x8 bus & 26MHz, 52MHz
eMMC Reduces TAT
typical TAT with NAND
  • Changes in Chipset/OS/NAND require change in FTL
  • Change in FTL requires NAND-level testing

Typical TAT with NAND

typical TAT with eMMC
  • Increase in revenue with faster time to market
  • Multiple suppliers possible with MMC standard interface

Typical TAT with eMMC

Future Architecture with eMMC
current Mobile Phone with eMMC & moviMCP
  • Stand alone devices and data storage only
  • moviMCP provides space saving advantage
    - Code : SLC NAND/NOR and DRAM
    - Data : eMMC

Future mobile phone with bootable moviMCP

future mobile phone with bootable eMMC
  • eMMC4.41 JEDEC standard was finalized by 2Q 2009
  • Moving to a unified storage with Hybrid eMMC architecture
moving to a unified storage with hybrid architecture (SLC+MLC)

Storage Architecture Evolving to Unified Storage

eMMC Package Comparison

eMMC Package Comparison

SAMSUNG eMMC Ordering Information
Density Controller Part number Org Volt Clock PKG PKG size MMC ver Status
2GB VFX_U KLM2G1HE3F-B00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 11.5x13 eMMC 4.41 MP
4GB VFX_U KLM4G1FE3B-B00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 11.5x13 eMMC 4.41 MP
8GB VFX_U KLM8G2FE3B-B00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 11.5x13 eMMC 4.41 MP
16GB VFX_U KLMAG4FE3B-A00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 12x16 eMMC 4.41 MP
VHX KLMAG2GE4A-A00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 12x16 eMMC 4.41 MP
32GB VFX_U KLMBG8FE3B-A00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 12x16 eMMC 4.41 MP
VHX KLMBG4GE4A-A00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 12x16 eMMC 4.41 MP
64GB VHX KLMCG8GE4A-A00x x8 1.7~1.95
2.7~3.6
Max. 52MHz DDR 153FBGA 12x16 eMMC 4.41 MP
note
  • CS : Customer Sample
  • MP : Mass Production